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Overview
Mid-Level

Embedded SW/Firmware Design Engineer

Confirmed live in the last 24 hours

CHAOS Industries

CHAOS Industries

Compensation

salary range: $160,000 - 225,000

Hawthorne, California, United States
On-site
Posted March 27, 2026

Job Description

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com. 

 

Role Overview:

CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.   

Responsibilities: 

  • Design and implement complex FPGA designs targeting our next-generation sensor products
  • Support system integration of FPGA designs with complex software systems
  • Support deployed FPGA capabilities in the hands of our U.S. and international customers
  • Work full-time on-site in our office in Hawthorne, California

Minimum Requirements:

  • Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
  • 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
  • Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
  • Extensive experience developing in Verilog and SystemVerilog
  • Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
  • Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
  • Experience with Network Protocols (TCP/UDP/IP)
  • Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
  • Experience using Bash and Python for scripting and testing
  • Experience modifying software drivers and applications when needed to validate FPGA designs
  • Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
  • Ability to work with minimal supervision and collaborate on small teams
  • U.S. Person status is required as this position will require the ability to access U.S.-only data systems 

Preferred Requirements:

  • Experience designing and implementing highly performant baseband signal processing in an FPGA
  • Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
  • Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
  • Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
  • Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
  • Experience with Analog Device Transceivers
  • Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
  • Experience with Time Synchronization technolog
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