Staff, CPU Architecture & Performance Research Engineer
Confirmed live in the last 24 hours
Samsung Semiconductor
Compensation
$163,000 - $253,000/year
Job Description
Please Note:
To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World’s Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.
Staff, CPU Architecture & Performance Research Engineer
What You’ll Do
Architecture Research Lab is looking for Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions.
You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads
Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy
Job ID: 42850
- Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem).
- Build, extend, and validate architectural performance models and simulators.
- Perform CPI/IPC breakdowns and root-cause performance bottlenecks.
- Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models.
- Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces).
- Translate performance data into clear architectural recommendations.
- Work leading to patents and publication.
What You Bring
- Master’s in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience.
- 5+ years of experience in CPU microarchitecture and/or performance engineering.
- Experience with RISC-V, ARM or X86 architectures.
- Strong understanding of:
- Out-of-order execution, branch prediction, pipelines, and speculation
- Cache coherence, memory systems, prefetching, and NUMA effects
- Hands-on experience with architectural simulators (like gem5).
- Strong programming skills in C/C++ and Python.
- Experience analyzing large performance datasets and traces.
- Familiarity with compiler optimizations and hardware/software co-design..
- Proven ability - prior tapeout experience.
Preferred Qualifications
- Background in power/performance/area (PPA) trade-off analysis.
- Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads..
- Prior leadership guiding junior engineers.
- Prior patent / publication experience.
- You’re inclusive, adapting your style to the situation and diverse global norms of our people.
- You approach challenges with curiosity and resilience, seeking data to help build understanding.
- You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
- Innovative and creativ
