SerDes Lead Designer

About the job 

We are looking for a SerDes Lead Designer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology to power next generation AI.  

Preferred Location - On-Site at our Irvine, CA HQ 

Alternate Location - San Jose, California; Vancouver, British Columbia; Ottawa, Ontario

Candidate will have the opportunity to architect and design SerDes for next generation transceivers. 

What You Will Do: 

• Define architecture, specifications, and circuit topologies for next-generation SerDes  

• Overview development of system-level modelling, with behavioral models (e.g., MATLAB, SystemVerilog, Verilog-A) to analyze link budgets, equalization strategies and jitter budgeting 

• Design high-performance analog/mixed-signal circuits in advanced node technologies  

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