Technology Development Engineer – Hybrid Bonding & Advanced Packaging (Internship)

Who We Are

Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that we create and service is essential to advancing AI and accelerating the commercialization of next-generation semiconductor chips. Join us and push the boundaries of materials science and engineering in a company at the foundation of the electronics industry. The work we do together advances the world’s technology. 

What We Offer

Location:

Singapore,SGP

You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible—while learning every day in a supportive leading global company. Visit our Careers website to learn more. 

At Applied Materials, we care about the health and wellbeing of our employees. We’re committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits. 

Advanced packaging technologies are critical enablers for continued semiconductor performance scaling beyond traditional node shrink. This internship project will focus on the development and integration of key advanced packaging building blocks, including redistribution layers (RDL), damascene copper structures, wafer-level interconnects, and hybrid bonding processes.

The intern will support the Process Integration team in developing and characterizing test vehicles used for chip-to-wafer and wafer-to-wafer hybrid bonding applications. Responsibilities include process flow development, experimental design, data analysis, defect characterization, and correlation of process parameters to electrical and physical performance metrics. The intern will gain hands-on exposure to semiconductor fabrication processes, advanced packaging integration challenges, statistical data analysis, and engineering problem-solving methodologies.

By the end of the internship, the candidate is expected to develop a solid understanding of advanced packaging technology, process integration principles, and engineering best practices while contributing to ongoing R&D projects supporting next-generation semiconductor packaging solutions.

Additional Information

Time Type:

Full time

Employee Type:

Intern / Student

Travel:

No

Relocation Eligible:

No

Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.