Sr. ASIC Design Verification Engineer (Starshield)

SR. ASIC DESIGN VERIFICATION ENGINEER (STARSHIELD)

Starshield leverages SpaceX’s Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and commercial use, Starshield is designed for government use, with an initial focus on earth observation, communications, and hosted payloads. As an ASIC Design Verification Engineer on the Starshield team, you will be working on advanced development programs in support of U.S. National Security. In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. You will work in a highly collaborative and fast-paced environment, where we are exploring unsolved problems and applying the SpaceX mindset of iterating rapidly to go from design and demo to operational capability at lightning pace.

RESPONSIBILITIES:

• Responsible for digital ASIC verification at block and system level
• Lead and execute verification test plan, development, and milestones from beginning to end, develop test harnesses and test sequences
• Develop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocks
• Responsible for test plan execution, running regressions, code and functional coverage closure
• Automate test case generation by using Python and MATLAB programs
• Contribute to pre-silicon verification, chip bring-up and post-silicon validation
• Be a hands-on self-starter who can execute the steps required to fully verify complex digital designs

BASIC QUALIFICATIONS:

• Bachelor’s degree in electrical engineering, computer engineering, or computer science
• 5+ years of experience with design verification and test bench development

PREFERRED SKILLS AND EXPERIENCE:

• Advanced degree in electrical engineering or computer engineering
• Experience with verification methodologies such as UVM/OVM/VMM
• Strong object-oriented programming knowledge
• Strong problem-solving and coding skills
• Experience in constrained random verification
• Expertise in developing test plans, implementing coverage models, and analyzing results
• Experience with scripting languages, e.g. Python for automation
• RTL design, chip bring-up, and post-silicon validation experience
• Ability to work in a dynamic environment with changing needs and requirements
• Ability to work in a dynamic environment with changing needs and requirements
• Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
• Enjoy being challenged and learning new skills

ADDITIONAL REQUIREMENTS: 

• Ability to work long hours and weekends as necessary to support critical milestones 
• Willingness to travel for off-site testing
• An active clearance may provide the opportunity for you to work on sensitive SpaceX missions; if so, you will be subject to pre-employment drug and random drug and alcohol testing

COMPENSATION AND BENEFITS:    
    
Pay range:    
Sr. ASIC Design Verification Engineer: $160,000.00 - $225,000.00/per year    
    
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience. Those with an active clearance will receive a 10% differential, up to an additional $15,000 annually, once officially briefed into a classified program.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the