ASIC Design Technical Staff Engineer

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Job Description:

ASIC Design Technical Staff Engineer

Role Summary:

We are seeking a highly experienced and collaborative technical leader to drive execution and innovation across FPGA products’ RTL design, verification, and implementation. This role is ideal for someone with deep technical expertise and a team-oriented mindset, looking to grow into a future management position.

Key Responsibilities:

• Implement architecture specification into a microarchitecture specification, and then into RTL - leading to first--silicon-success. Drive all adjacent functions.
• Build, Lead and mentor a high-performing engineering team.
• Drive microarchitecture and design reviews, ensuring high-quality deliverables.
• Collaborate cross-functionally with global teams on FPGA and SOC development.
• Champion best practices in RTL implementation, verification, and prototyping.
• Support hiring, onboarding, and team building efforts.
• Own performance management and development planning for team members.
• Deliver technical presentations tailored to both abstract and detailed audiences.
• Drive continuous improvements for industry-leading methodologies and outcomes

Requirements/Qualifications:

Requirements/Qualifications:

Required Qualifications:

• Bachelor's or Master’s degree in electrical engineering, Computer Engineering, or a related field with extensive experience (12+ years) in digital ASIC/SoC design
• 6+ years in a leadership role, with a track record of successfully delivering ASIC products.
• Proven leadership in technical teams with a collaborative working style
• Deep expertise in RTL implementation, verification, and design closure
• Expertise in implementation of complex protocols, such as PCIe/Ethernet/Network Security/DDR, or processors (ARM/RISC-V/etc.)
• Strong proficiency in SystemVerilog, related programming, Static Timing Analysis, CDC/RDC, Lint, UPF techniques, RTL and gate-level simulations, mixed-mode simulations and debug techniques
• Experience in mentoring, hiring, and performance management
• Skilled in presenting technical content at varying levels of abstraction depending on the audience
• Excellent communication and stakeholder management skills

Preferred Qualifications:

• Strong understanding of FPGA development
• Experience leading cross-site teams and succession planning
• Familiarity with tools such as Synopsys, Cadence, or Mentor Graphics
• Exposure to project planning and organizational development

Travel Time:

0% - 25%

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